1. Field of the Invention
The invention relates to a data transfer system, in particular, a system in which a plurality of devices or a plurality of circuit blocks share and use one memory.
2. Description of the Related Art
A system in which a plurality of devices or a plurality of circuit blocks share and use one memory has been known conventionally. In this kind of system, in general, a memory receives an access signal from devices or circuit blocks that serve as masters and outputs readout data. In this case, if each of the devices or each of the circuit blocks does not have a memory control circuit for reading out the data of the memory, each of these can not read out the data of the memory.
Furthermore, there is a case where a plurality of devices or circuit blocks simultaneously access one memory. For such a case of simultaneous accesses, it is necessary to mount an access control circuit on the memory side, which avoids access collision and controls the priorities of the data outputs from the memory and so on.
This kind of system in which devices or circuit blocks that need data in a memory serve as masters and the memory that holds the data serves as a slave is disclosed in Japanese Patent Application Publication Nos. Hei 11-039222, Hei 11-175499 and 2001-325243.
As described above, in a system in which a plurality of devices or a plurality of circuit blocks share and use one memory, each of the devices or circuit blocks needs to have a memory control circuit for reading out the data of the memory, thereby increasing the circuit size in the whole system. Furthermore, an access control circuit is mounted on the memory side, thereby further contributing to the increase of the circuit size.
This provides the system with complexity and large circuit size as a whole.